Interrupt (Glossary Entry)

A technique used by nearly every microprocessor and microcontroller to cause a branch in execution upon the occurrence of an event.

There are two broad categories:

  • Hardware interrupt – whereby the code is forced to branch when a hardware device (e.g. serial interface, GPIO input, timer, ADC etc..) flags that an event has occurred.
  • Software interrupt – whereby the code is forced to branch when a software event occurs, such as a divide by zero or a trap instruction.

When an interrupt occurs, a few things typically occur:

  • context save – whereby CPU registers are preserved, typically on the stack
  • return address is preserved
  • the execution branches to a specified function, known as an “Interrupt Service Routine” (ISR).
  • upon completion, the return address is reinstated and the registers restored, (as if nothing had occurred).

The ISR may well have modified some memory, or interacted with the state of the hardware. Such effects are sometimes known as “side effects”. The programmer has to be very careful not to cause data corruption of deadlocks (beyond the scope of this course).

Interrupts are commonly used to achieve a timely response to external events. For example:

  • when a timer reaches its target value, a branch is forced so that a function executes at precise intervals. This is sometimes used in sampling.
  • when a serial interface receives some data, an interrupt is forced to read the data and prevent data loss.
  • if power begins to fail, an on-chip “brown-out” detection can generate an interrupt to put the system in a safe state before shutting down (assuming there is enough time to react of course).

Nested Interrupts

Some devices allow interrupts to interrupt (or preempt) each other. They typically use a numerical priority scheme to determine which interrupts take precedence. 

It can be quite challenging to design real-time systems using such as scheme.

Power Saving

The CMOS logic used to build modern micros only consumes power when it is switching state. 

When a CPU has nothing to do, simply cycling inside a loop is therefore wasteful of power, as is powering unused peripherals.

Most micros can switch of peripherals that are not required (in the case of the ARM series of devices, the clocks are gated off to prevent them switching). Furthermore, most support idle modes, whereby the execution logic is suspended in a low power state. It is interrupts that wake the CPU from the low power state to service a request. When all requests have been services, the CPU returns to an idle mode.

It is probably worth pointing out that without interrupts, the CPU cannot escape idle mode.