{"id":30,"date":"2018-09-11T09:50:25","date_gmt":"2018-09-11T09:50:25","guid":{"rendered":"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/?page_id=30"},"modified":"2018-09-27T13:43:22","modified_gmt":"2018-09-27T13:43:22","slug":"test-benches","status":"publish","type":"page","link":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/","title":{"rendered":"Test Benches"},"content":{"rendered":"<p>In VHDL, or any HDL for that matter, testing is almost everything! Your VHDL components have no value unless you can evidence that they perform the desired function.<\/p>\n<p>As a general rule, for each component you develop, there should be at least one test bench.<\/p>\n<p>In this series of articles we look at how we use VHDL test benches to test our components.<\/p>\n<p><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/part-1-single-architecture-test\/\">Part 1 &#8211; Testing a Single Architecture Component<\/a><\/p>\n<p><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/part-2-multiple-architectures\/\">Part 2 &#8211; Multiple Architectures<\/a><\/p>\n<p><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/part-3-automatic-testing-with-assert\/\">Part 3 &#8211; Automatic Testing with Assert<\/a><\/p>\n<p><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/part-4-testing-with-simulated-timing\/\">Part 4 &#8211; Testing with Simulated Timing<\/a><\/p>\n<p><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/part-5-timing-checks\/\">Part 5 &#8211; Timing Checks<\/a><\/p>\n<p><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/part-6-modelling-and-testing-synchronous-systems\/\">Part 6 &#8211; Modelling and Testing Synchronous Systems<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>In VHDL, or any HDL for that matter, testing is almost everything! Your VHDL components have no value unless you can evidence that they perform the desired function. As a general rule, for each component you develop, there should be at least one test bench. In this series of articles we look at how we&hellip; <a class=\"more-link\" href=\"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/test-benches\/\">Continue reading <span class=\"screen-reader-text\">Test Benches<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":28,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-30","page","type-page","status-publish","hentry","entry"],"_links":{"self":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/30","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/comments?post=30"}],"version-history":[{"count":3,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/30\/revisions"}],"predecessor-version":[{"id":269,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/30\/revisions\/269"}],"up":[{"embeddable":true,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/28"}],"wp:attachment":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/media?parent=30"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}