{"id":605,"date":"2019-03-12T17:04:32","date_gmt":"2019-03-12T17:04:32","guid":{"rendered":"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/?page_id=605"},"modified":"2019-03-12T17:50:12","modified_gmt":"2019-03-12T17:50:12","slug":"using-vector-waveform-files","status":"publish","type":"page","link":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/getting-started-with-quartus-v16-1\/using-vector-waveform-files\/","title":{"rendered":"Using Vector Waveform Files"},"content":{"rendered":"<p style=\"text-align: right\"><a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/getting-started-with-quartus-v16-1\/\">Back to Table of Contents<\/a><\/p>\n<p>For beginners, vector waveform files are an extremely useful means of simulating and testing logic circuits.<\/p>\n<p>This video shows you how to use a vector waveform file (VWF) in Quartus to perform some simple tests.<\/p>\n<p>https:\/\/plymouth.cloud.panopto.eu\/Panopto\/Pages\/Viewer.aspx?id=dff82e0e-9903-49b9-bd84-aa0e00f8793f<\/p>\n<p>The next video introduces a clock signal &#8211; such circuits are classed as sequential logic, whereby their outputs change relative to a common clock edge (typically rising). The focus of this video is not to study this aspect of digital electronics, more to understand how to use the tools to simulate a clock signal and check the outputs.<\/p>\n<p>https:\/\/plymouth.cloud.panopto.eu\/Panopto\/Pages\/Viewer.aspx?id=487aba0c-4b76-4508-850f-aa0e00fe1f35<\/p>\n<p>If you have problems running vector waveform files, consider the following:<\/p>\n<ul>\n<li>Do you have spaces in your project path or component names?\n<ul>\n<li>Vector waveform files use another application known as ModelSim to perform the simulation. From what we can tell (at least for the version bundled with Quartus 16.1), this application does not tolerate spaces in paths.<\/li>\n<\/ul>\n<\/li>\n<li>Have you told Quartus where ModelSim (ASE) is installed? If not, <a href=\"https:\/\/plymouth.cloud.panopto.eu\/Panopto\/Pages\/Viewer.aspx?id=54b6446b-db8d-4292-826a-aa0e00e70e21\" target=\"_blank\" rel=\"noopener\">see this video<\/a><\/li>\n<\/ul>\n<hr \/>\n<p><strong>Next<\/strong> &#8211; <a href=\"http:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/getting-started-with-quartus-v16-1\/using-modelsim-for-interactive-simulation\/\">Using ModelSim for Interactive Simulation<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Back to Table of Contents For beginners, vector waveform files are an extremely useful means of simulating and testing logic circuits. This video shows you how to use a vector waveform file (VWF) in Quartus to perform some simple tests. https:\/\/plymouth.cloud.panopto.eu\/Panopto\/Pages\/Viewer.aspx?id=dff82e0e-9903-49b9-bd84-aa0e00f8793f The next video introduces a clock signal &#8211; such circuits are classed as sequential&hellip; <a class=\"more-link\" href=\"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/fpga-and-vhdl\/getting-started-with-quartus-v16-1\/using-vector-waveform-files\/\">Continue reading <span class=\"screen-reader-text\">Using Vector Waveform Files<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":596,"menu_order":1,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-605","page","type-page","status-publish","hentry","entry"],"_links":{"self":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/605","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/comments?post=605"}],"version-history":[{"count":6,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/605\/revisions"}],"predecessor-version":[{"id":637,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/605\/revisions\/637"}],"up":[{"embeddable":true,"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/pages\/596"}],"wp:attachment":[{"href":"https:\/\/blogs.plymouth.ac.uk\/embedded-systems\/wp-json\/wp\/v2\/media?parent=605"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}